1. Field of the Invention
This invention relates to a solid state imaging device manufacturing process and a solid state imaging device, and, more particularly, the present invention relates to a solid state imaging device manufacturing process by which a solid state imaging device which is capable of outputting a mirror image can be manufactured and a solid resultant state imaging device manufactured by the solid state imaging device manufacturing method.
2. Description of the Related Art
Various solid state imaging devices are conventionally known, and one of such conventional solid state imaging devices is shown in FIG. 11(a). Referring to FIG. 11(a), the conventional solid state imaging device shown includes an imaging section 30, a horizontal charge transfer section 31 formed as a ring for horizontally transferring signal charge transferred thereto from the imaging section 30, a charge detection section 32 provided for the horizontal charge transfer section 31, and an output circuit section 33 provided for the horizontal charge transfer section 31. The transferring direction of the horizontal charge transfer section 31 is changed to lead out a regular image output or a mirror image output from a common output terminal 34.
Another conventional solid state imaging device is shown in FIG. 11(b). Referring to FIG. 11(b), the conventional solid state imaging device shown includes a horizontal charge transfer section 41, a pair of charge detection sections 42 and 43 provided at the opposite ends of the horizontal charge transfer section 41, and a pair of output circuit sections 44 and 45 provided on the opposite sides of the charge detection sections 42 and 43 remote from the horizontal charge transfer section 41. The solid state imaging device has a pair of output terminals 46 and 47 for a regular image and a mirror image.
With the conventional solid state imaging device described above with reference to FIG. 11(a), however, the length of the transfer route of signal charge upon outputting of a mirror image is equal to or greater than twice that upon outputting of a regular image, and consequently, the conventional solid state imaging device is disadvantageous in that transfer degradation upon outputting of a mirror image cannot be avoided. Besides, since two outputs of a regular image and a mirror image are allowed, a driving system for exclusive use is necessary for each of a regular image and a mirror image. Consequently, the solid state imaging device is disadvantageous also in that adjustment in phase of driving waveforms for horizontal transfer is very difficult.
Also with the conventional solid state imaging device described above with reference to FIG. 11(b), since outputs of a regular image and a mirror image are allowed, there is a drawback in that, similarly to the solid state imaging device of FIG. 11(a), driving systems for exclusive use for a regular image and a mirror image are necessitated.
Here, the construction and the transferring operation of the horizontal charge transfer section 41 of the solid state imaging device shown in FIG. 11(b) will be described.
The construction will first be described with reference to FIGS. 12(a) and 12(b). Four first to fourth electrodes H1 to H4 are formed successively and repetitively in one direction for each transfer section 51 for one bit on an upper face of a semiconductor substrate 51 with a gate insulating film 53 interposed therebetween. It is to be noted that each slanting line area in FIG. 12(a) denotes a channel stop.
The thickness of the gate insulating film 53 or the impurity concentration of the front face side of the substrate 51 is varied so that, when an equal potential is applied to the electrodes H1 to H4, potential wells formed below the first electrode H1 and the third electrode H3 may be deeper than potential wells formed below the second electrode H2 and the fourth electrode H4.
Four horizontal transfer clocks H.PHI.1 to H.PHI.4 generated from a timing generator not shown are supplied to the first to fourth electrodes H1 to H4, respectively. The four horizontal transfer clocks H.PHI.1 to H.PHI.4 are a combination of clocks of two phases. Accordingly, the horizontal charge transfer section 41 is driven by two phases to horizontally transfer signal charge.
Subsequently, the transferring operation in horizontal transfer of the horizontal charge transfer section 41 having the construction described above will be described.
First, transferring operation for obtaining a regular image signal will be described. In this instance, four horizontal transfer clocks H.PHI.1 to H.PHI.4 having such waveforms as shown in FIG. 13 are applied to the first to fourth electrodes H1 to H4, respectively.
When the time t is t=t.sub.0, the horizontal transfer clocks H.PHI.1 and H.PHI.2 exhibit a high (H) level while the horizontal transfer clocks H.PHI.3 and H.PHI.4 exhibit a low (L) level. Consequently, the potentials below the electrodes exhibit such a distribution as seen in FIG. 14(a). In particular, referring to waveform in FIG. 14(a), the potentials exhibit a staircase distribution wherein the level decreases from the fourth electrode H4 in the leftward direction in FIGS. 14(a) to 14(c) toward the first electrode H1, and the potential well formed below the first electrode H1 is deepest. Consequently, signal charge e transferred from the imaging section 30 is accumulated below the first electrode H1.
When the time t is t=t.sub.1, the horizontal transfer clocks H.PHI.1 and H.PHI.2 exhibit a low level while the horizontal transfer clocks H.PHI.3 and H.PHI.4 exhibit a high level. Consequently, the potentials below the electrodes exhibit such a staircase distribution as seen from the waveform in FIG. 14(b) wherein the level decreases from the second electrode H2 in the leftward direction in FIGS. 14(a) to 14(c) toward the third electrode H3, and the potential well formed below the third electrode H3 is deepest. Consequently, signal charge e is transferred from below the first electrode H1 to below the third electrode H3.
When the time t is t=t.sub.2, the horizontal transfer clocks H.PHI.1 and H.PHI.2 exhibit a high level while the horizontal transfer clocks H.PHI.3 and H.PHI.4 exhibit a low level. Consequently, the potentials below the electrodes exhibit such a staircase distribution as seen from the waveform in FIG. 14(c) wherein the level decreases from the fourth electrode H4 in the leftward direction in FIGS. 14(a) to 14(c) toward the first electrode H1 again, and the potential well formed below the first electrode H1 is deepest. Consequently, signal charge e is transferred from below the third electrode H3 to below the first electrode H1.
In this manner, transfer of signal charge e takes place in the leftward direction in FIGS. 12(a) and 12(b) in the horizontal charge transfer section 41, and as a result, a regular image signal is led out.
Subsequently, operation for leading out a mirror image will be described. In this instance, four horizontal transfer clocks H.PHI.1 to H.PHI.4 having such waveforms as shown in FIG. 15 are applied to the first to fourth electrodes H1 to H4, respectively.
When the time t is t=t.sub.0, the horizontal transfer clocks H.PHI.1 and H.PHI.4 exhibit a low level while the horizontal transfer clocks H.PHI.2 and H.PHI.3 exhibit a high level. Consequently, the potentials below the electrodes exhibit such a staircase distribution as seen from the waveform in FIG. 16(a) wherein the level decreases from the fourth electrode H4 in the right direction in FIGS. 16(a) to 16(c) toward the third electrode H3, and the potential well formed below the third electrode H3 is deepest. Consequently, signal charge e transferred from the imaging section 30 is accumulated below the third electrode H3.
When the time t is t=t.sub.1, the horizontal transfer clocks H.PHI.1 and H.PHI.4 exhibit a high level while the horizontal transfer clocks H.PHI.2 and H.PHI.3 exhibit a low level. Consequently, the potentials below the electrodes exhibit such a staircase distribution as seen from the waveform in FIG. 16(b) wherein the level decreases from the second electrode H2 in the rightward direction in FIGS. 16(a) to 16(c) toward the first electrode H1, and the potential well formed below the first electrode H1 is deepest. Consequently, signal charge e is transferred from below the third electrode H3 to below the first electrode H1.
When the time t is t=t.sub.2, the horizontal transfer clocks H.PHI.1 and H.PHI.4 exhibit a low level while the horizontal transfer clocks H.PHI.2 and H.PHI.3 exhibit a high level. Consequently, the potentials below the electrodes exhibit such a staircase distribution as seen from the waveform in FIG. 16(c) wherein the level decreases from the fourth electrode H4 in the rightward direction in FIGS. 16(a) to 16(c) toward the third electrode H3 again, and the potential well formed below the third electrode H3 is deepest. Consequently, signal charge e is transferred from below the first electrode H1 to below the third electrode H3.
In this manner, transfer of signal charge e takes place in the rightward direction in FIGS. 12(a) and 12(b) in the horizontal charge transfer section 41, and as a result, a mirror image signal is led out.
As described above, with the conventional solid state imaging device shown in FIG. 11(b), the phases of the horizontal transfer clocks H.PHI.1 to H.PHI.4 to be applied to the first to fourth electrodes Hi to H4 are changed to reverse the transferring direction in the horizontal charge transfer section 41 to lead out either one of a regular image output and a mirror image output. Accordingly, although the horizontal charge transfer section 41 is driven in two phases, a timing generator which can generate four horizontal transfer clocks H.PHI.1 to H.PHI.4 is necessitated. Consequently, an existing driving circuit cannot be employed as it is as a driving circuit which includes such timing generator. Besides, driving systems for exclusive use for a regular image and a mirror image must be provided separately.